Method and Implementation of High-speed Digital Sampling Technology Based on Impulse Radar Signal
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摘要: 该文针对无载频脉冲雷达信号周期重复性的特点,提出了一种全新的高速数字采样方法和原理。该方法利用FPGA 的差分比较器端口构成高速1 bit 量化器,采用FPGA 内部多相位时钟,对1 bit 数据流进行并行交替数字采样,并缓冲编码,从而获得上吉赫兹的等效数字采样率。通过将多个比较电平下的1 bit 采样数据进行累积,从而完成高速数字采样过程。在Xilinx 的XC2V3000 的FPGA 中实现了该方法,获得了采样率达1.6 GHz 的8 bit等效高速模数转换器功能。该设计方法不仅能够提高等效采样方式的效率,而且与高速实时采样相比,具有低功耗、低成本的优势,在实际中获得了良好的应用。Abstract: A High-speed digital sampling technology suitable for periodical impulse radar signal is proposed in this paper. One bit high-speed quantize is constructed by differential comparator in FPGA. Time-interleaved digital sampling and buffer encoding are used to one bit stream based on the internal multi-phase clock of FPGA, to achieve sampling rate higher than 1 GHz. High speed digital sampling is realized by the accumulation of one bit sampling data with different comparison levels. An 8 bit, 1.6 GHz ADC based on the proposed method is realized on XC2V3000 Xilinxs FPGA, which is successfully applied in GPR. The proposed method has the advantages of low cost and power consumption as compared with real sampling, and exhibits higher efficiency as compared with equivalent sampling.
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Key words:
- FPGA /
- Digital sampling /
- One bit quantize /
- Compare level
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